Authors : Nethravathi M.Sa, Veda Sandeep Nagarajab, S .L.Pinjare
In this paper, we have analyzed six different compensation schemes to determine their suitability for high speed op amp design. Op amp with typical unity gain frequency greater than 250MHz, gain better than 50dB and phase margin more than 50° is considered. The op amp design consists of a differential amplifier stage and common source stage. Detailed SPICE simulation using 180 nm technology and parameter voltage 1.8V are performed. The compensation scheme with voltage buffer and compensation capacitor is found to be best for high speed design.
Keywords : op-amp, Miller compensation, CMOS, current mirror load,voltage buffer, SLCL,SLDP.